</a>STM8S105xx" title="STM8S105xx">STM8S105xx" title="STM8S105xx">STM8S105xx是8位MCU,提供16-32KB閃存程序存儲器和數據EEPROM,讀/寫次數高達300k,具有降低系統成本的優勢,CPU工作頻率16MHz,工作電壓2.95V-5.5V. ST公司的STEVAL-IFN004V1評估板是采用L6230和STM8的六步進馬達驅動器,DC電壓從8V到48V,沒個輸出最大負載電流1.4 Ar.m.s(峰值2.8A),集成了5V DC/DC穩壓器,適用于冷卻風扇和泵.本文介紹了STM8S105xx主要優勢和特性,方框圖, STEVAL-IFN004V1評估板主要特性,電路圖和材料清單與PCB布局圖.
The STM8S105xx access line 8-bit microcontrollers offer from 16 to 32 Kbytes Flash program memory, plus integrated true data EEPROM. They are referred to as medium-density devices in the STM8S microcontroller family reference manual (RM0016).
STM8S105xx主要優勢:
All devices of the STM8S105xx access line provide the following benefits:
• Reduced system cost
- Integrated true data EEPROM for up to 300 k write/erase cycles
- High system integration level with internal clock oscillators, watchdog and brown-out reset.
• Performance and robustness
- 16 MHz CPU clock frequency
- Robust I/O, independent watchdogs with separate clock source
- Clock security system
• Short development cycles
- Applications scalability across a common family product architecture with compatible pinout, memory map and and modular peripherals.
- Full documentation and a wide choice of development tools
• Product longevity
- Advanced core and peripherals made in a state-of-the art technology
- A family of products for applications with 2.95 to 5.5 V operating supply
主要特性:
Core
• 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline
• Extended instruction set
Memories
• Medium-density Flash/EEPROM:
- Program memory up to 32 Kbytes; data retention 20 years at 55°C after 10 kcycles
- Data memory up to 1 Kbytes true data EEPROM; endurance 300 kcycles
• RAM: Up to 2 Kbytes
Clock, reset and supply management
• 2.95 V to 5.5 V operating voltage
• Flexible clock control, 4 master clock sources:
- Low power crystal resonator oscillator
- External clock input
- Internal, user-trimmable 16 MHz RC
- Internal low power 128 kHz RC
• Clock security system with clock monitor
• Power management:
- Low power modes (wait, active-halt, halt)
- Switch-off peripheral clocks individually
• Permanently active, low consumption power-on and power-down reset
Interrupt management
• Nested interrupt controller with 32 interrupts
• Up to 37 external interrupts on 6 vectors
Timers
• 2x 16-bit general purpose timers, with 2+3 CAPCOM channels (IC, OC or PWM)
• Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
• 8-bit basic timer with 8-bit prescaler
• Auto wake-up timer
• Window and independent watchdog timers
Communications interfaces
• UART with clock output for synchronous operation, Smartcard, IrDA, LIN
• SPI interface up to 8 Mbit/s
• I2C interface up to 400 Kbit/s
Analog-to-digital converter (ADC)
• 10-bit, ±1 LSB ADC with up to 10 multiplexed channels, scan mode and analog watchdog
I/Os
• Up to 38 I/Os on a 48-pin package including 16 high sink outputs
• Highly robust I/O design, immune against current injection
Development support
• Embedded single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging
Unique ID
• 96-bit unique key for each device
圖1.STM8S105xx方框圖
STEVAL-IFN004V1: BLDC six-step motor drive based on the L6230 and STM8
The STEVAL-IFN004V1 is a demonstration board based on STMicroelectronic’s STM8S105K4 microcontrollers and the DMOS fully integrated 3-phase motor driver L6230 implementing a trapezoidal control (6-step) for a brushless direct current motor (BLDC) in both sensor and sensorless configurations.
It is designed as an evaluation environment for motor control applications in the range of 8 V - 48 V of DC bus voltage (which is extendable up to 52 V) and nominal power up to 35 W using the STM8S105K4 microcontroller with internal 16 kB Flash and the L6230 DMOS driver with 2.8 A output peak current, non-dissipative overcurrent detection/protection, cross conduction protection, uncommitted comparator, thermal shutdown, and undervoltage lockout.
With dedicated hardware evaluation features, the STEVAL-IFN004V1 board is designed to help developers evaluate the device and develop their own applications.
The STEVAL-IFN004V1 can be used together with the STM8 BLDC firmware library v1.0 and constitutes a complete motor control evaluation and development platform.
The characteristics of the STEVAL-IFN004V1 BLDC 6-step driver board are the following:
● DC voltage range from 8 V to 48 V (extendable up to 52 V)
● Maximum load current of 1.4 Ar.m.s. (2.8 A peak) for each output
● Integrated DC-DC regulator (5 V)
● Monolithic power stage in QFN package featuring overcurrent and thermal protections
● Single shunt current sensing
● Control interface through trimmer and buttons
● Debug outputs
● Hall sensor/encoder inputs
● Optimized layout on 4-layer board for high thermal performance.
The demonstration kit is designed to fit all typical low-power BLDC motor applications, for
example:
● Cooling fans
● Pumps
圖2. STM8S105xx評估板STEVAL-IFN004V1外形圖
圖3.評估板STEVAL-IFN004V1電路圖(1)
圖4.評估板STEVAL-IFN004V1電路圖(2)
評估板STEVAL-IFN004V1材料清單:
圖5.評估板STEVAL-IFN004V1 PCB布局圖:頂層和內1層
圖6.評估板STEVAL-IFN004V1 PCB布局圖:底層和內2層
詳情請見:
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00200092.pdf
和
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/USER_MANUAL/DM00040505.pdf
The STM8S105xx access line 8-bit microcontrollers offer from 16 to 32 Kbytes Flash program memory, plus integrated true data EEPROM. They are referred to as medium-density devices in the STM8S microcontroller family reference manual (RM0016).
STM8S105xx主要優勢:
All devices of the STM8S105xx access line provide the following benefits:
• Reduced system cost
- Integrated true data EEPROM for up to 300 k write/erase cycles
- High system integration level with internal clock oscillators, watchdog and brown-out reset.
• Performance and robustness
- 16 MHz CPU clock frequency
- Robust I/O, independent watchdogs with separate clock source
- Clock security system
• Short development cycles
- Applications scalability across a common family product architecture with compatible pinout, memory map and and modular peripherals.
- Full documentation and a wide choice of development tools
• Product longevity
- Advanced core and peripherals made in a state-of-the art technology
- A family of products for applications with 2.95 to 5.5 V operating supply
主要特性:
Core
• 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline
• Extended instruction set
Memories
• Medium-density Flash/EEPROM:
- Program memory up to 32 Kbytes; data retention 20 years at 55°C after 10 kcycles
- Data memory up to 1 Kbytes true data EEPROM; endurance 300 kcycles
• RAM: Up to 2 Kbytes
Clock, reset and supply management
• 2.95 V to 5.5 V operating voltage
• Flexible clock control, 4 master clock sources:
- Low power crystal resonator oscillator
- External clock input
- Internal, user-trimmable 16 MHz RC
- Internal low power 128 kHz RC
• Clock security system with clock monitor
• Power management:
- Low power modes (wait, active-halt, halt)
- Switch-off peripheral clocks individually
• Permanently active, low consumption power-on and power-down reset
Interrupt management
• Nested interrupt controller with 32 interrupts
• Up to 37 external interrupts on 6 vectors
Timers
• 2x 16-bit general purpose timers, with 2+3 CAPCOM channels (IC, OC or PWM)
• Advanced control timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
• 8-bit basic timer with 8-bit prescaler
• Auto wake-up timer
• Window and independent watchdog timers
Communications interfaces
• UART with clock output for synchronous operation, Smartcard, IrDA, LIN
• SPI interface up to 8 Mbit/s
• I2C interface up to 400 Kbit/s
Analog-to-digital converter (ADC)
• 10-bit, ±1 LSB ADC with up to 10 multiplexed channels, scan mode and analog watchdog
I/Os
• Up to 38 I/Os on a 48-pin package including 16 high sink outputs
• Highly robust I/O design, immune against current injection
Development support
• Embedded single wire interface module (SWIM) for fast on-chip programming and non intrusive debugging
Unique ID
• 96-bit unique key for each device
圖1.STM8S105xx方框圖
STEVAL-IFN004V1: BLDC six-step motor drive based on the L6230 and STM8
The STEVAL-IFN004V1 is a demonstration board based on STMicroelectronic’s STM8S105K4 microcontrollers and the DMOS fully integrated 3-phase motor driver L6230 implementing a trapezoidal control (6-step) for a brushless direct current motor (BLDC) in both sensor and sensorless configurations.
It is designed as an evaluation environment for motor control applications in the range of 8 V - 48 V of DC bus voltage (which is extendable up to 52 V) and nominal power up to 35 W using the STM8S105K4 microcontroller with internal 16 kB Flash and the L6230 DMOS driver with 2.8 A output peak current, non-dissipative overcurrent detection/protection, cross conduction protection, uncommitted comparator, thermal shutdown, and undervoltage lockout.
With dedicated hardware evaluation features, the STEVAL-IFN004V1 board is designed to help developers evaluate the device and develop their own applications.
The STEVAL-IFN004V1 can be used together with the STM8 BLDC firmware library v1.0 and constitutes a complete motor control evaluation and development platform.
The characteristics of the STEVAL-IFN004V1 BLDC 6-step driver board are the following:
● DC voltage range from 8 V to 48 V (extendable up to 52 V)
● Maximum load current of 1.4 Ar.m.s. (2.8 A peak) for each output
● Integrated DC-DC regulator (5 V)
● Monolithic power stage in QFN package featuring overcurrent and thermal protections
● Single shunt current sensing
● Control interface through trimmer and buttons
● Debug outputs
● Hall sensor/encoder inputs
● Optimized layout on 4-layer board for high thermal performance.
The demonstration kit is designed to fit all typical low-power BLDC motor applications, for
example:
● Cooling fans
● Pumps
圖2. STM8S105xx評估板STEVAL-IFN004V1外形圖
圖3.評估板STEVAL-IFN004V1電路圖(1)
圖4.評估板STEVAL-IFN004V1電路圖(2)
評估板STEVAL-IFN004V1材料清單:
圖5.評估板STEVAL-IFN004V1 PCB布局圖:頂層和內1層
圖6.評估板STEVAL-IFN004V1 PCB布局圖:底層和內2層
詳情請見:
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00200092.pdf
和
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/USER_MANUAL/DM00040505.pdf
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